Patent · US Active

Method and apparatus for reducing read disturb in memory

US8526235B2 · kind B2 · utility

1Cited by

5References

20Claims

0Family size

Assignee

MACRONIX INTERNATIONAL CO., LTD. · TW

Inventors

Chun-Hsiung Hung · Hsinchu, TW
Shuo-Nan Hung · Zhubei City, TW
Tseng-Yi Liu · Hsinchu, TW

Key dates

Filing date	Feb 27, 2012
Grant date	Sep 3, 2013
Priority date	—
Expiry date	Feb 27, 2032

Classification

Technology area (CPC G)Physics
CPC primaryG11C16/10
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Various aspects of a NAND memory include have multiple versions of a high threshold voltage distribution—a version with a reduced maximum, and another version. The version with a reduced maximum has a reduced word line pass voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.