High voltage transistor using diluted drain
US8530296B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2013 |
| Grant date | Sep 10, 2013 |
| Priority date | — |
| Expiry date | Feb 12, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/126
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit containing an extended drain MOS transistor may be formed by forming a drift region implant mask with mask fingers abutting a channel region and extending to the source/channel active area, but not extending to a drain contact active area. Dopants implanted through the exposed fingers form lateral doping striations in the substrate under the mask fingers. An average doping density of the drift region under the gate is at least 25 percent less than an average doping density of the drift region at the drain contact active area. In one embodiment, the dopants diffuse laterally to form a continuous drift region. In another embodiment, substrate material between lateral doping striations remains an opposite conductivity type from the lateral doping striations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.