Radiation hardened integrated circuit

US8530298B2 · kind B2 · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Richard Guerra Roybal · Arlington, US
• Shariq Arshad · Sachse, US
• Shaoping Tang · Plano, US
• James Fred Salzman · Dallas, US

Key dates

• Filing date: Nov 1, 2011
• Grant date: Sep 10, 2013
• Expiry date: Apr 13, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/859

Abstract

A method of forming an integrated circuit (IC) includes providing a substrate having a topside semiconductor surface, wherein the topside semiconductor surface includes at least one of N+ buried layer regions and P+ buried layer regions. An epitaxial layer is grown on the topside semiconductor surface. Pwells are formed in the epitaxial layer. Nwells are formed in the epitaxial layer. NMOS devices are formed in and over the pwells, and PMOS devices are formed in and over the nwells.