Patent · US Active

Method for operating an integrated circuit having a resistivity changing memory cell

US8531863B2 · kind B2 · utility

7Cited by

1References

22Claims

0Family size

Assignee

Adesto Technologies Corporation · US

Inventors

Ralf Symanczyk · Bad Aibling, DE
Corvin Liaw · Birkenfeld, DE

Key dates

Filing date	May 20, 2005
Grant date	Sep 10, 2013
Priority date	—
Expiry date	Dec 4, 2028

Classification

Technology area (CPC G)Physics
CPC primaryG11C2213/79
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method for operating a resistivity changing memory including applying a programming voltage to a resistivity changing memory cell to define a programmed state and applying a refresh voltage to the resistivity changing memory cell for maintaining the programmed state of the resistivity changing memory cell. In one embodiment, the refresh voltage is less than the programming voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.