Patent · US Active

Moveable locked lines in a multi-level cache

US8533395B2 · kind B2 · utility

21Cited by

8References

22Claims

0Family size

Assignee

Micron Technology, Inc. · US

Inventors

Dennis M. O'Connor · Chandler, US
Michael William Morrow · Cary, US
Stephen Strazdus · Chandler, US

Key dates

Filing date	Feb 24, 2006
Grant date	Sep 10, 2013
Priority date	—
Expiry date	Jul 15, 2029

Classification

Technology area (CPC G)Physics
CPC primaryG06F12/0888
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A processor includes a multi-level cache hierarchy where a lock property is associated with a cache line. The cache line retains the lock property and may move back and forth within the cache hierarchy. The cache line may be evicted from the cache hierarchy after the lock property is removed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.