Michael William Morrow
48Patents
10h-index
37Co-inventors
75Inventor score
Filing activity: Aug 4, 1995 → Jul 8, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6624535B2 | Digitally controlling the output voltage of a plurality of voltage sources | Electricity | 52 | Expired |
| US7120714B2 | High-speed starvation-free arbiter system, rotating-priority arbiter, and two stage arbitration method | Physics | 42 | Expired |
| US7284137B2 | System and method for managing power consumption within an integrated circuit | Emerging Cross-Sectional Technologies | 29 | Expired |
| US8533395B2 | Moveable locked lines in a multi-level cache | Physics | 21 | Active |
| US10855674B1 | Pre-boot network-based authentication | Physics | 19 | Active |
| US6664775B1 | Apparatus having adjustable operational modes and method therefore | Emerging Cross-Sectional Technologies | 19 | Expired |
| US8932996B2 | Gas hydrate inhibitors and methods for making and using same | Chemistry; Metallurgy | 17 | Active |
| US7917702B2 | Data prefetch throttle | Physics | 15 | Active |
| US5646361A | Laser emitting visual display for a music system | Human Necessities | 11 | Expired |
| US7428645B2 | Methods and apparatus to selectively power functional units | Emerging Cross-Sectional Technologies | 10 | Expired |
| US6898718B2 | Method and apparatus to monitor performance of a process | Physics | 9 | Expired |
| US6949918B2 | Apparatus having adjustable operational modes and method therefore | Emerging Cross-Sectional Technologies | 7 | Expired |
| US7337272B2 | Method and apparatus for caching variable length instructions | Physics | 6 | Active |
| US7596683B2 | Switching processor threads during long latencies | Physics | 6 | Active |
| US9043795B2 | Apparatus and methods for adaptive thread scheduling on asymmetric multiprocessor | Emerging Cross-Sectional Technologies | 5 | Active |
| US9477478B2 | Multi level indirect predictor using confidence counter and program counter address filter scheme | Physics | 5 | Active |
| US7949834B2 | Method and apparatus for setting cache policies in a processor | Physics | 5 | Active |
| US10709117B2 | Aquaculture systems and methods | Emerging Cross-Sectional Technologies | 4 | Active |
| US7434027B2 | Translation lookaside buffer prediction mechanism | Physics | 3 | Active |
| US7472390B2 | Method and apparatus to enable execution of a thread in a multi-threaded computer system | Physics | 3 | Expired |
| US9477476B2 | Fusing immediate value, write-based instructions in instruction processing circuits, and related processor systems, methods, and computer-readable media | Physics | 3 | Active |
| US8341383B2 | Method and a system for accelerating procedure return sequences | Physics | 3 | Active |
| US9092358B2 | Memory management unit with pre-filling capability | Physics | 3 | Active |
| US8060701B2 | Apparatus and methods for low-complexity instruction prefetch system | Physics | 3 | Active |
| US7039763B2 | Apparatus and method to share a cache memory | Physics | 2 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.