Store-to-load forwarding based on load/store address computation source information comparisons
US8533438B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 2010 |
| Grant date | Sep 10, 2013 |
| Priority date | — |
| Expiry date | Jul 11, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3861
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprocessor includes a queue comprising a plurality of entries each configured to hold store information for a store instruction. The store information specifies sources of operands used to calculate a store address. The store instruction specifies store data to be stored to a memory location identified by the store address. The microprocessor also includes control logic, coupled to the queue, configured to encounter a load instruction. The load instruction includes load information that specifies sources of operands used to calculate a load address. The control logic detects that the load information matches the store information held in a valid one of the plurality of queue entries and responsively predicts that the microprocessor should forward to the load instruction the store data specified by the store instruction whose store information matches the load information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.