System and method of error correction of control data at a memory device
US8533564B2 · kind B2 · utility
14Cited by
24References
20Claims
0Family size
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Key dates
| Filing date | Dec 23, 2009 |
| Grant date | Sep 10, 2013 |
| Priority date | — |
| Expiry date | May 20, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/403
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A controller coupled to a memory array includes an error correction coding (ECC) engine and an ECC enhancement compression module coupled to the ECC engine. The ECC enhancement compression module is configured to receive and compress control data to be provided to the ECC engine to be encoded. Compressed encoded control data generated at the ECC engine is stored as a codeword at the memory array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.