Arjun Kapoor
11Patents
5h-index
11Co-inventors
59Inventor score
Filing activity: Aug 6, 2007 → Mar 7, 2017
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8533564B2 | System and method of error correction of control data at a memory device | Physics | 14 | Active |
| US8533558B2 | System and method of error correction of control data at a memory device | Physics | 13 | Active |
| US8583947B2 | Methods and systems for dynamically controlling operations in a non-volatile memory to limit power consumption | Emerging Cross-Sectional Technologies | 9 | Active |
| US8555095B2 | Methods and systems for dynamically controlling operations in a non-volatile memory to limit power consumption | Emerging Cross-Sectional Technologies | 8 | Active |
| US9063732B2 | Methods and systems for dynamically controlling operations in a non-volatile memory to limit power consumption | Emerging Cross-Sectional Technologies | 7 | Active |
| US7599241B2 | Enhanced write abort mechanism for non-volatile memory | Physics | 4 | Active |
| US8495402B2 | Methods and systems for dynamically controlling operations in a non-volatile memory to limit power consumption | Emerging Cross-Sectional Technologies | 4 | Active |
| US9607664B2 | Leveraging portable system power to enhance memory management and enable application level features | Physics | 0 | Active |
| US8522055B2 | Peak power validation methods and systems for non-volatile memory | Physics | 0 | Active |
| US9965186B2 | Leveraging portable system power to enhance memory management and enable application level features | Physics | 0 | Active |
| US9690734B2 | Quasi-optimized interconnection network for, and method of, interconnecting nodes in large-scale, parallel systems | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.