Method of erasing semiconductor memory device
US8537632B2 · kind B2 · utility
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Key dates
| Filing date | Apr 27, 2011 |
| Grant date | Sep 17, 2013 |
| Priority date | — |
| Expiry date | Feb 16, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of erasing a semiconductor memory device comprises grouping a plurality of word lines of each memory block into at least two groups based on intensity of disturbance between neighboring word lines; performing an erase operation by applying a ground voltage to all word lines of a selected memory block and by applying an erase voltage to a well of the selected memory block; and first increasing the ground voltage of one group of the groups to a positive voltage during the erase operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.