Semiconductor device having shielded conductive vias
US8541883B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2011 |
| Grant date | Sep 24, 2013 |
| Priority date | — |
| Expiry date | Dec 20, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/00014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a semiconductor device having a shielding layer. The semiconductor device includes a substrate, an inner metal layer, a shielding layer, an insulation material, a metal layer, a passivation layer and a redistribution layer. The inner metal layer is disposed in a through hole of the substrate. The shielding layer surrounds the inner annular metal. The insulation material is disposed between the inner metal layer and the shielding layer. The metal layer is disposed on a surface of the substrate, contacts the shielding layer and does not contact the inner metal layer. The redistribution layer is disposed in an opening of the passivation layer so as to contact the inner metal layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.