Memory access method and flash memory using the same
US8542532B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 17, 2011 |
| Grant date | Sep 24, 2013 |
| Priority date | — |
| Expiry date | Apr 10, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory access method is applied in a memory controller for accessing an NAND memory array, including a number of respective select switches globally controlled with a string select signal. The memory access method includes the following steps. A stream bias signal and a selected word line signal are respectively provided on a selected stream and on a selected cell of the selected stream, and the rest of memory cells are turned on as pass transistors, in the setup phase. A discharge path is provided to eliminate coupling charge presented on unselected streams, in the setup phase. Then, the string select signal is enabled to have the selected stream connected to a sense unit via a metal bit line and according read the selected cell in a voltage sensing scheme, in a read phase, which does not overlap with the setup phase.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.