Patent · US Active

Memory architecture having two independently controlled voltage pumps

US8542541B2 · kind B2 · utility

8Cited by

19References

17Claims

0Family size

Assignee

Cypress Semiconductor Corporation · US

Inventors

Ryan T. Hirose · Colorado Springs, US
Fredrick B. Jenne · Tracy, US
Vijay Srinivasaraghavan · Colorado Springs, US
Igor G. Kouznetsov · San Jose, US
Paul Fredrick Ruths · Woodland Park, US
Cristinel Zonte · Colorado Springs, US
Bogdan I. Georgescu · Colorado Springs, US
Leonard Vasile Gitlan · Colorado Springs, US
James Paul Myers · Miami, US

Key dates

Filing date	Feb 28, 2012
Grant date	Sep 24, 2013
Priority date	—
Expiry date	Feb 28, 2032

Classification

Technology area (CPC G)Physics
CPC primaryG11C16/32
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In embodiments described herein, a memory architecture has an array of non-volatile memory cells and a pair of independently controlled voltage pumps. The pair of voltage pumps is coupled for supplying both positive and negative voltage biases to the memory array during program and erase operations, such that a sum of the magnitudes of the positive and negative voltage biases is applied across a storage node of an accessed memory cell.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.