Igor G. Kouznetsov
41Patents
10h-index
34Co-inventors
71Inventor score
Filing activity: Jul 12, 2001 → Aug 8, 2018
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6888750B2 | Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication | Electricity | 318 | Expired |
| US8093128B2 | Integration of non-volatile charge trap memory devices and logic CMOS devices | Electricity | 84 | Active |
| US6704235B2 | Anti-fuse memory cell with asymmetric breakdown voltage | Electricity | 49 | Expired |
| US7825455B2 | Three terminal nonvolatile memory device with vertical gated diode | Electricity | 44 | Active |
| US6897514B2 | Two mask floating gate EEPROM and method of making | Electricity | 39 | Expired |
| US8853765B2 | Dense arrays and charge storage devices | Electricity | 28 | Active |
| US7615436B2 | Two mask floating gate EEPROM and method of making | Electricity | 19 | Expired |
| US7969804B1 | Memory architecture having a reference current generator that provides two reference currents | Physics | 14 | Active |
| US8796098B1 | Embedded SONOS based memory cells | Electricity | 12 | Active |
| US8953380B1 | Systems, methods, and apparatus for memory cells with common source lines | Physics | 11 | Active |
| US8125835B2 | Memory architecture having two independently controlled voltage pumps | Physics | 9 | Active |
| US6531366B1 | Method and structure for high-voltage device with self-aligned graded junctions | Electricity | 8 | Expired |
| US8675405B1 | Method to reduce program disturbs in non-volatile memory cells | Physics | 8 | Active |
| US8542541B2 | Memory architecture having two independently controlled voltage pumps | Physics | 8 | Active |
| US9171857B2 | Dense arrays and charge storage devices | Electricity | 6 | Active |
| US9431124B2 | Method to reduce program disturbs in non-volatile memory cells | Physics | 4 | Active |
| US8988938B2 | Method to reduce program disturbs in non-volatile memory cells | Physics | 4 | Active |
| US9361994B1 | Method of increasing read current window in non-volatile memory | Physics | 3 | Active |
| US9355725B2 | Non-volatile memory and method of operating the same | Physics | 3 | Active |
| US9356035B2 | Embedded SONOS based memory cells | Electricity | 3 | Active |
| US10062573B1 | Embedded SONOS with triple gate oxide and manufacturing method of the same | Electricity | 3 | Active |
| US9466374B2 | Systems, methods, and apparatus for memory cells with common source lines | Physics | 3 | Active |
| US9704585B2 | High voltage architecture for non-volatile memory | Electricity | 2 | Active |
| US9123642B1 | Method of forming drain extended MOS transistors for high voltage circuits | Electricity | 2 | Active |
| US10644021B2 | Dense arrays and charge storage devices | Electricity | 2 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.