Compact read only memory cell

US8546251B1 · kind B1 · utility

Assignee

• SYNOPSYS, INC. · US

Inventors

• Vineet Kumar SACHAN · Ghaziabad, IN
• Amit Khanuja · New Delhi, IN
• Deepak Sabharwal · Fremont, US

Key dates

• Filing date: Dec 31, 2008
• Grant date: Oct 1, 2013
• Expiry date: Sep 22, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B20/34

Abstract

A method of manufacturing a read only memory cell includes connecting electrically a drain of the transistor to the bit line with a first conductor and a via. The method also includes generating a logic zero at a source of the transistor by electrically connecting the source of the transistor to a ground line with the first conductor. Further, the method includes, programming the read only memory cell to logic zero. A method of manufacturing a read only memory cell includes connecting electrically a drain of the transistor to the bit line with a first conductor and a via. The method also includes, connecting electrically a source of the transistor to the drain with the first conductor. Further, the method includes programming the read only memory cell to logic one.