Routable single layer substrate and semiconductor package including same
US8551820B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2009 |
| Grant date | Oct 8, 2013 |
| Priority date | — |
| Expiry date | Jun 7, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10689
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In accordance with the present invention, there is provided a routable substrate that may be used, for example, in relation to the manufacture of Dual and Quad Flat No-Lead (DFN/QFN) style semiconductor packages as a substrate or interposer of such packages. The method of fabricating the substrate effectively removes metal from the saw streets and provides a more stable surface structure for wire bonding. The substrate fabrication method also utilizes existing etching techniques which are implemented in a prescribed sequence to achieve no metal in the saw streets and to completely electrically isolated features. Further, the substrate fabrication method includes a molding step intended to replace pressure sensitive adhesive tapes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.