Packaging method of molded wafer level chip scale package (WLCSP)

US8563361B2 · kind B2 · utility

Assignee

• Alpha and Omega Semiconductor, Ltd. · US

Inventors

• Yan Xun Xue · Nanhu, CN
• Hamza Yilmaz · Saratoga, US
• Yueh-Se Ho · Sunnyvale, US
• Jun Lu · San Jose, US
• Ping Huang · Shanghai, CN
• Lei Shi · Shanghai, CN
• Lei Duan · San Jose, US
• Yuping Gong · Shanghai, CN

Key dates

• Filing date: Jul 12, 2012
• Grant date: Oct 22, 2013
• Expiry date: Jul 12, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/13091
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A WLCSP method comprises: depositing a metal bump on bonding pads of chips; forming a first packaging layer at front surface of wafer to cover metal bumps while forming an un-covered ring at the edge of wafer to expose the ends of each scribe line located between two adjacent chips; thinning first packaging layer to expose metal bumps; forming a groove on front surface of first packaging layer along each scribe line by cutting along a straight line extended by two ends of scribe line exposed on front surface of un-covered ring; grinding back surface of wafer to form a recessed space and a support ring at the edge of the wafer; depositing a metal layer at bottom surface of wafer in recessed space; cutting off the edge portion of wafer; and separating individual chips from wafer by cutting through first packaging layer, the wafer and metal layer along groove.