Semiconductor devices having a diffusion barrier layer and methods of manufacturing the same
US8563411B2 · kind B2 · utility
4Cited by
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20Claims
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Key dates
| Filing date | Jul 27, 2011 |
| Grant date | Oct 22, 2013 |
| Priority date | — |
| Expiry date | Oct 12, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of manufacturing a semiconductor device include forming a gate insulation layer including a high-k dielectric material on a substrate that is divided into a first region and a second region; forming a diffusion barrier layer including a first metal on a second portion of the gate insulation layer in the second region; forming a diffusion layer on the gate insulation layer and the diffusion barrier layer; and diffusing an element of the diffusion layer into a first portion of the gate insulation layer in the first region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.