STT MRAM magnetic tunnel junction architecture and integration

US8564079B2 · kind B2 · utility

Assignee

• QUALCOMM Incorporated · US

Inventors

• Seung H. Kang · San Diego, US
• Xia Li · San Diego, US
• Shiqun Gu · San Diego, US
• Kangho Lee · Singapore, SG
• Xiaochun Zhu · San Diego, US

Key dates

• Filing date: Jan 19, 2009
• Grant date: Oct 22, 2013
• Expiry date: Aug 22, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N50/10

Abstract

A magnetic tunnel junction (MTJ) device for a magnetic random access memory (MRAM) in a semiconductor back-end-of-line (BEOL) process flow includes a first metal interconnect for communicating with at least one control device and a first electrode for coupling to the first metal interconnect through a via formed in a dielectric passivation barrier using a first mask. The device also includes an MTJ stack for storing data coupled to the first electrode, a portion of the MTJ stack having lateral dimensions based upon a second mask. The portion defined by the second mask is over the contact via. A second electrode is coupled to the MTJ stack and also has a same lateral dimension as defined by the second mask. The first electrode and a portion of the MTJ stack are defined by a third mask. A second metal interconnect is coupled to the second electrode and at least one other control device.