Implementing eDRAM stacked FET structure

US8574982B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Karl R. Erickson · Rochester, US
• David P. Paulsen · Dodge Center, US
• John E. Sheets, II · Zumbrota, US
• Kelly L. Williams · Rochester, US

Key dates

• Filing date: Feb 25, 2010
• Grant date: Nov 5, 2013
• Expiry date: Mar 11, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D1/68

Abstract

A method and circuit for implementing an embedded dynamic random access memory (eDRAM), and a design structure on which the subject circuit resides are provided. The embedded dynamic random access memory (eDRAM) circuit includes a stacked field effect transistor (FET) and capacitor. The capacitor is fabricated directly on top of the FET to build the eDRAM.