Z2FET field-effect transistor with a vertical subthreshold slope and with no impact ionization
US8581310B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 12, 2012 |
| Grant date | Nov 12, 2013 |
| Priority date | — |
| Expiry date | Sep 12, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/117
Abstract
The transistor comprises first and second source/drain electrodes formed in a semiconductor film by N-doped and P-doped areas, respectively. A polarization voltage is applied between the two source/drain electrodes in order to impose to the P-doped electrode a potential higher than that of the N-doped electrode. The transistor comprises first and second devices for generating a potential barrier in the semiconductor film. The two potential barriers are opposed to the passage of the charge carriers emitted by the first and second source/drain electrodes, respectively. The two potential barriers are shifted with respect to an axis connecting the two source/drain electrodes. The two devices for generating a potential barrier are configured to generate a potential barrier having a variable amplitude and it are electrically connected to the gate and to the counter electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.