Method for depackaging prepackaged integrated circuit die and a product from the method
US8586407B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2011 |
| Grant date | Nov 19, 2013 |
| Priority date | — |
| Expiry date | May 24, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for providing a known good integrated circuit die having enhanced planarity from a prepackaged integrated circuit die having a surface warpage such as in a ball grid array (BGA) package is provided. A partially-depackaged integrated circuit package is affixed to a substrate with a spacer element there between such that the active surface of the die within the partially depackaged integrated circuit die is “bowed” slightly upwardly to define a convex surface. The exposed encapsulant on the now-convex surface of the mounted, partially-depackaged integrated circuit package is then lapped or ground away to a predetermined depth so that an integrated circuit die is provided having an enhanced planarity and surface uniformity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.