Integrated circuit using a superjunction semiconductor device

US8587055B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Martin Stiftinger · Stockdorf, DE
• Snezana Jenei · Munich, DE
• Wolfgang Werner · Hersbruck, DE
• Uwe Hodel · Munich, DE

Key dates

• Filing date: Feb 23, 2007
• Grant date: Nov 19, 2013
• Expiry date: Nov 10, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/151

Abstract

In an embodiment, an apparatus includes a source region, a gate region and a drain region supported by a substrate, and a drift region including a plurality of vertically extending n-wells and p-wells to couple the gate region and the drain region of a transistor, wherein the plurality of n-wells and p-wells are formed in alternating longitudinal rows to form a superjunction drift region longitudinally extending between the gate region and the drain region of the transistor.