Memory read-out
US8589765B1 · kind B1 · utility
3Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2013 |
| Grant date | Nov 19, 2013 |
| Priority date | — |
| Expiry date | Jul 12, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system having a plurality of memory cells for storing payload data and redundancy data. The memory system having a read-out circuit configured to read-out a status of the plurality of memory cells, the read-out status having payload data, redundancy data and associated reliability information. Moreover, the memory system has a data processor configured to derive the payload data from the read-out status using the reliability information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.