Wiring structure and method for manufacturing the same
US8592303B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 1, 2010 |
| Grant date | Nov 26, 2013 |
| Priority date | — |
| Expiry date | Mar 1, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
There are provided with a wiring structure and a method for manufacturing the same wherein in a wiring structure of multi-layered wiring in which a metal wiring is formed on a substrate forming a semiconductor element thereby obtaining connection of the element, no damage to insulation property between the abutting wirings by occurrence of leakage current and no deterioration of insulation resistance property between the abutting wirings are achieved in case that fine metal wiring is formed in a porous insulation film. The insulation barrier layer 413 is formed between an interlayer insulation film and the metal wiring, in the metal wiring structure on the substrate forming the semiconductor element. The insulation barrier layer enables to reduce leakage current between the abutting wirings and to elevate the insulation credibility.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.