Multichip electronic packages and methods of manufacture
US8592970B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2011 |
| Grant date | Nov 26, 2013 |
| Priority date | — |
| Expiry date | Jun 27, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/166
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A multi-chip electronic package and methods of manufacture are provided. The method comprises adjusting a piston position of one or more pistons with respect to one or more chips on a chip carrier. The adjusting comprises placing a chip shim on the chips and placing a seal shim between a lid and the chip carrier. The seal shim is thicker than the chip shim. The adjusting further comprise lowering the lid until the pistons contact the chip shim. The method further comprises separating the lid and the chip carrier and removing the chip shim and the seal shim. The method further comprises dispensing thermal interface material on the chips and lowering the lid until a gap filled with the thermal interface material is about a particle size of the thermal interface material. The method further comprises sealing the lid to the chip carrier with sealant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.