Method for fabricating semiconductor device with buried gates
US8598012B2 · kind B2 · utility
1Cited by
26References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2010 |
| Grant date | Dec 3, 2013 |
| Priority date | — |
| Expiry date | Dec 26, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/513
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a semiconductor device includes sequentially stacking a pad oxide layer and a hard mask layer over a substrate, forming a device isolation layer over the substrate, forming a capping layer pattern configured to open a first region of the substrate and cover a second region of the substrate, removing the hard mask layer, removing the capping layer pattern, and removing the pad oxide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.