Package-on-package system with through vias and method of manufacture thereof
US8598034B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 2012 |
| Grant date | Dec 3, 2013 |
| Priority date | — |
| Expiry date | Nov 16, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacture of a package-on-package system includes: providing a substrate connection; attaching a semiconductor die to the substrate connection using an adhesive, with the substrate connection affixed directly by the adhesive; forming an encapsulant around the semiconductor die to have a bottom exposed surface coplanar with a bottom surface of the substrate connection and to have a top exposed surface with through openings extending therefrom through the bottom exposed surface; and creating through vias by applying solder into the through openings, the through vias coplanar with the bottom exposed surface of the encapsulant and coplanar with the top exposed surface of the encapsulant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.