Test structure for ILD void testing and contact resistance measurement in a semiconductor device

US8598579B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Dmytro Chumakov · Dresden, DE
• Dirk Utess · Dresden, DE

Key dates

• Filing date: Feb 3, 2011
• Grant date: Dec 3, 2013
• Expiry date: Nov 24, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

In complex semiconductor devices, the contact characteristics may be efficiently determined on the basis of a test structure which includes a combination of interconnect chain structures and a comb structure including gate electrode structures. Consequently, an increased amount of measurement information may be obtained on the basis of a reduced overall floor space of the test structure. In this manner, the complex manufacturing sequence for forming a contact level of a semiconductor device may be quantitatively estimated and monitored.