Air gap isolation in non-volatile memory
US8603890B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2011 |
| Grant date | Dec 10, 2013 |
| Priority date | — |
| Expiry date | Dec 11, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/30
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Air gap isolation in non-volatile memory arrays and related fabrication processes are provided. Electrical isolation between adjacent active areas of a substrate can be provided, at least in part, by bit line air gaps that are elongated in a column direction between the active areas. At least one cap is formed over each isolation region, at least partially overlying air to provide an upper endpoint for the corresponding air gap. The caps may be formed at least partially along the sidewalls of adjacent charge storage regions. In various embodiments, selective growth processes are used to form capping strips over the isolation regions to define the air gaps. Word line air gaps that are elongated in a row direction between adjacent rows of storage elements are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.