Inventor · Santa Clara, CA, US

Tuan Pham

101Patents

17h-index

112Co-inventors

89Inventor score

Filing activity: Dec 17, 1997 → May 26, 2022

Most-cited inventions

Patent	Title	Area	Cited by	Status
US9659956B1	Three-dimensional memory device containing source select gate electrodes with enhanced electrical isolation	Electricity	74	Active
US5998301A	Method and system for providing tapered shallow trench isolation structure profile	Electricity	48	Expired
US6261904A	Dual bit isolation scheme for flash devices	Electricity	39	Expired
US9917093B2	Inter-plane offset in backside contact via structures for a three-dimensional memory device	Electricity	32	Active
US10014316B2	Three-dimensional memory device with leakage reducing support pillar structures and method of making thereof	Electricity	30	Active
US6867097B1	Method of making a memory cell with polished insulator layer	Electricity	29	Expired
US7795080B2	Methods of forming integrated circuit devices using composite spacer structures	Physics	28	Active
US8546239B2	Methods of fabricating non-volatile memory with air gaps	Electricity	25	Active
US6934772B2	Lowering display power consumption by dithering brightness	Physics	24	Expired
US10103161B2	Offset backside contact via structures for a three-dimensional memory device	Electricity	23	Active
US9842851B2	Three-dimensional memory devices having a shaped epitaxial channel portion	Electricity	22	Active
US8603890B2	Air gap isolation in non-volatile memory	Electricity	21	Active
US10283566B2	Three-dimensional memory device with through-stack contact via structures and method of making thereof	Electricity	20	Active
US8969206B1	Triple patterning NAND flash memory with stepped mandrel	Electricity	20	Active
US9768270B2	Method of selectively depositing floating gate material in a memory device	Electricity	19	Active
US7723186B2	Method of forming memory with floating gates including self-aligned metal nanodots using a coupling layer	Emerging Cross-Sectional Technologies	18	Active
US8492224B2	Metal control gate structures and air gap isolation in non-volatile memory	Electricity	18	Active
US5966618A	Method of forming dual field isolation structures	Electricity	17	Expired
US7541240B2	Integration process flow for flash devices with low gap fill aspect ratio	Electricity	15	Expired
US7183153B2	Method of manufacturing self aligned non-volatile memory cells	Electricity	14	Expired
US7582529B2	Methods of fabricating non-volatile memory with integrated peripheral circuitry and pre-isolation memory cell formation	Electricity	14	Active
US7362615B2	Methods for active boosting to minimize capacitive coupling effect between adjacent gates of flash memory devices	Electricity	14	Expired
US7504686B2	Self-aligned non-volatile memory cell	Electricity	14	Active
US6465303B1	Method of manufacturing spacer etch mask for silicon-oxide-nitride-oxide-silicon (SONOS) type nonvolatile memory	Electricity	13	Expired
US7482223B2	Multi-thickness dielectric for semiconductor memory	Electricity	13	Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.