Flange for semiconductor die
US8604609B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 18, 2012 |
| Grant date | Dec 10, 2013 |
| Priority date | — |
| Expiry date | Oct 18, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/4913
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a curved body and a plurality of semiconductor die. The curved body includes first and second opposing end regions and an intermediate center region. The curved body has a first inflection point at the center region, a second inflection point at the first end region and a third inflection point at the second end region. The center region has a convex curvature with a minimal extremum at the first inflection point, the first end region has a concave curvature with a maximal extremum at the second inflection point and the second end region has a concave curvature with a maximal extremum at the third inflection point. The plurality of semiconductor die are attached to an upper surface of the curved body between the maximal extrema.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.