Stair step formation using at least two masks
US8609536B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 6, 2012 |
| Grant date | Dec 17, 2013 |
| Priority date | — |
| Expiry date | Jul 6, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Apparatuses and methods for stair step formation using at least two masks, such as in a memory device, are provided. One example method can include forming a first mask over a conductive material to define a first exposed area, and forming a second mask over a portion of the first exposed area to define a second exposed area, the second exposed area is less than the first exposed area. Conductive material is removed from the second exposed area. An initial first dimension of the second mask is less than a first dimension of the first exposed area and an initial second dimension of the second mask is at least a second dimension of the first exposed area plus a distance equal to a difference between the initial first dimension of the second mask and a final first dimension of the second mask after a stair step structure is formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.