Inventor · Fremont, CA, US

Deepak Thimmegowda

29Patents
7h-index
34Co-inventors
65Inventor score

Filing activity: Jul 6, 2012 → Jul 25, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US8609536B1 Stair step formation using at least two masks Electricity 26 Active
US9219070B2 3-D memory arrays Electricity 20 Active
US9287184B2 Apparatuses and methods for die seal crack detection Electricity 12 Active
US9595533B2 Memory array having connections going through control gates Electricity 11 Active
US10269626B2 Stair step formation using at least two masks Electricity 10 Active
US9082772B2 Stair step formation using at least two masks Electricity 7 Active
US10770470B2 Memory array having connections going through control gates Electricity 7 Active
US9557376B2 Apparatuses and methods for die seal crack detection Electricity 7 Active
US9870941B2 Stair step formation using at least two masks Electricity 6 Active
US8853769B2 Transistors and semiconductor constructions Electricity 5 Active
US10043751B2 Three dimensional storage cell array with highly dense and scalable word line design approach Electricity 4 Active
US10593624B2 Three dimensional storage cell array with highly dense and scalable word line design approach Electricity 3 Active
US9865357B1 Performing read operations on a memory device Physics 1 Active
US11398489B2 Memory array having connections going through control gates Electricity 1 Active
US10804280B2 Memory device with vertical string drivers Electricity 0 Active
US11424256B2 Transistors, semiconductor constructions, and methods of forming semiconductor constructions Electricity 0 Active
US11393716B2 Devices including stair step structures, and related apparatuses and memory devices Electricity 0 Active
US12148802B2 Vertical string driver with channel field management structure Electricity 0 Active
US9219132B2 Transistors, semiconductor constructions, and methods of forming semiconductor constructions Electricity 0 Active
US12089412B2 Vertical string driver with extended gate junction structure Electricity 0 Active
US9508591B2 Stair step formation using at least two masks Electricity 0 Active
US12120878B2 Block-to-block isolation and deep contact using pillars in a memory array Electricity 0 Active
US12356614B2 Memory array having connections going through control gates Electricity 0 Active
US10515973B2 Wordline bridge in a 3D memory array Electricity 0 Active
US11653496B2 Asymmetric junctions of high voltage transistor in NAND flash memory Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.