Methods for forming fine patterns of a semiconductor device
US8614148B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 3, 2013 |
| Grant date | Dec 24, 2013 |
| Priority date | — |
| Expiry date | Jan 3, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method may include forming first hard mask patterns and second hard mask patterns extending in a first direction and repeatedly and alternately arranged on a lower layer, forming third mask patterns extending in a second direction perpendicular to the first direction on the first and second hard mask patterns, etching the first hard mask patterns using the third mask patterns to form first openings, forming filling patterns filling the first openings and gap regions between the third mask patterns, forming spacers on both sidewalls of each of the filling patterns, after removing the third mask patterns, and etching the second hard mask patterns using the filling patterns and the spacers to form second openings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.