Methods of manufacturing semiconductor structures using RIE process
US8614150B2 · kind B2 · utility
0Cited by
8References
29Claims
0Family size
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Key dates
| Filing date | Jul 10, 2008 |
| Grant date | Dec 24, 2013 |
| Priority date | — |
| Expiry date | Jan 1, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31116
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for etching on a semiconductors at the back end of line using reactive ion etching. The method comprises reduced pressure atmosphere and a mixture of gases at a specific flow rate ratio during plasma generation and etching. Plasma generation is induced by a source radio frequency and anisotropic etch performance is induced by a second bias radio frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.