Integrated circuit packaging system with encapsulation connector and method of manufacture thereof
US8624364B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2010 |
| Grant date | Jan 7, 2014 |
| Priority date | — |
| Expiry date | Nov 5, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit packaging system includes: a base integrated circuit package having a base integrated circuit on a base substrate thereof; a base barrier on the base substrate adjacent a base perimeter of the base substrate; a stack substrate over the base substrate, the stack substrate having a stack substrate aperture with the stack substrate having an inter-substrate connector thereon; a connector underfill through the stack substrate aperture encapsulating the inter-substrate connector, overflow of the connector underfill prevented by the base barrier; and a cavity formed of the stack substrate, the base integrated circuit package, and the connector underfill, the cavity horizontally offset from the base barrier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.