Gate configuration determination and selection from standard cell library
US8627263B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 3, 2012 |
| Grant date | Jan 7, 2014 |
| Priority date | — |
| Expiry date | Feb 3, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method comprises determining gate configuration from a standard cell library for optimizing behavior of a logic gate in an electronic circuit to be resized. The determining includes defining variables for the logic gate to be resized and defining nets influenced by the logic gate to be resized. The determining includes determining constraints relative to other logic gates in the electronic circuit affected by the logic gate to be resized and formulating objective function. The determining includes solving the objective function using a linear programming solver based on the defined variables and the determined constraints. The determining includes outputting solving of the objective function obtained by linear programming solver for further processing. The gate configuration is selected from the standard cell library for optimizing behavior of the logic gate to be resized based on solving of the objective function.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.