Method of improving replacement metal gate fill
US8629007B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2011 |
| Grant date | Jan 14, 2014 |
| Priority date | — |
| Expiry date | Mar 8, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
Abstract
A method of making a gate of a field effect transistor (FET) with improved fill by a replacement gate process using a sacrificial film includes providing a substrate with a dummy gate. It further includes depositing a sacrificial layer and an encapsulating layer over the substrate, and planarizing so that the encapsulating layer, sacrificial layer and dummy gate are co-planar. The encapsulating layer and a portion of the sacrificial film are removed to leave a remaining sacrificial film. The dummy gate is removed to form and opening in the remaining sacrificial film and to expose sidewalls of the film. Spacers are formed on the sidewalls. A high dielectric constant film and metal film are deposited in the opening and planarized to form a gate. The remaining sacrificial film is removed. The method can be used on planar FETs as well non-planar FETs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.