Patent · US Active

System and method for strengthening of a circuit element to reduce an integrated circuit's power consumption

US8635578B1 · kind B1 · utility

1Cited by
10References
11Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 14, 2013
Grant dateJan 21, 2014
Priority date
Expiry dateMar 14, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2119/06
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A system and method enable strengthening of flip-Flops (FFs) in an integrated circuit (IC) for the purpose of reducing power consumption. This is achieved by using stability condition (STC) and observability don't-care (ODC) techniques. Strengthening enable is defined as ensuring that a FF later in the fan-out is enabled only when a FF earlier in the fan-out is driving a signal to that later FF. In an embodiment the fan-in of a FF is traversed and the STC or ODC is determined for the FF. Dependent on the determination a STC controller or an ODC controller is added to control the FF's enable signal. In an embodiment the power savings is checked and a controller is added only if there is a reduction in overall power consumption resulting from the addition of the controller.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.