Methods for photo-patternable low-k (PPLK) integration with curing after pattern transfer
US8637395B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 2009 |
| Grant date | Jan 28, 2014 |
| Priority date | — |
| Expiry date | Jul 21, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/12044
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A single damascene or dual damascene interconnect structure fabricated with a photo-patternable low-k dielectric (PPLK) which is cured after etching. This method prevents the PPLK damage and the tapering of the edges of the interconnect structure. In one embodiment, the method of the present invention includes depositing a photo-patternable low-k (PPLK) material atop a substrate. The at least one PPLK material is patterned, creating a single damascene structure. For dual damascene structures, a second PPLK layer is coated and patterned. An etch process is performed to transfer the pattern from the PPLK material into at least a portion of the substrate. A diffusion liner and a conductive material can be deposited after the etch process. The resulting structure is cured anytime after etching in order to transform the resist like PPLK into a permanent low-k material that remains within the structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.