Patent · US Active

Integrated lateral high voltage MOSFET

US8643099B2 · kind B2 · utility

5Cited by
8References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 20, 2013
Grant dateFeb 4, 2014
Priority date
Expiry dateJun 20, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/371
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

An integrated circuit containing a dual drift layer extended drain MOS transistor with an upper drift layer contacting a lower drift layer along at least 75 percent of a common length of the two drift layers. An average doping density in the lower drift layer is between 2 and 10 times an average doping density in the upper drift layer. A process of forming an integrated circuit containing a dual drift layer extended drain MOS transistor with a lower drift extension under the body region and an isolation link which electrically isolates the body region, using an epitaxial process. A process of forming an integrated circuit containing a dual drift layer extended drain MOS transistor with a lower drift extension under the body region and an isolation link which electrically isolates the body region, on a monolithic substrate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.