SRAM integrated circuits with buried saddle-shaped FINFET and methods for their fabrication

US8647938B1 · kind B1 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Peter Baars · Dresden, DE
• Matthias Goldbach · Dresden, DE

Key dates

• Filing date: Aug 9, 2012
• Grant date: Feb 11, 2014
• Expiry date: Aug 9, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D89/10

Abstract

SRAM ICs and methods for their fabrication are provided. One method includes depositing photoresist on a first oxide layer overlying a silicon substrate, forming a pattern of locations, using said photoresist, for the formation of two inverters, each having a pull up transistor, a pull down transistor, and a pass gate transistor on said oxide layer. The method involves anisotropically etching U-shaped channels in the oxide layer corresponding to pattern, and thereafter isotropically etching U-shaped channels in the silicon layer to form saddle-shaped fins in the silicon. A second oxide layer is deposited over the saddle-shaped fins, and a first metal layer is deposited over the second oxide layer. A contact metal layer is formed over the first metal layer and planarized to form local interconnections coupling the gate electrodes of one inverter to a node between the pull up and pull down transistors of the other inverter and to a source/drain of one of the pass gate transistors.