Patent · US Active

Processor based system having ECC based check and access validation information means

US8650440B2 · kind B2 · utility

7Cited by

13References

19Claims

0Family size

Assignee

Freeescale Semiconductor, Inc. · US

Inventors

Michael Rohleder · Unterschleißheim, DE
Gary Hay · Whinstanes, AU
Stephan Mueller · Durham, US
Manfred Thanner · Neubiberg, DE

Key dates

Filing date	Jan 16, 2008
Grant date	Feb 11, 2014
Priority date	—
Expiry date	May 30, 2029

Classification

Technology area (CPC G)Physics
CPC primaryG06F2201/845
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A system comprises a first master element; and at least one shared communication element arranged to operably couple the first master element to at least one slave element. The system further comprises at least one validation element located on at least one further validation path located between the first master element and the at least one slave element, wherein the at least one validation element is arranged to validate at least one of: at least one access request by the first master element; and a response to an access request from the at least one slave element.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.