Lithography performance check methods and apparatus
US8650511B2 · kind B2 · utility
1Cited by
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20Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 30, 2010 |
| Grant date | Feb 11, 2014 |
| Priority date | — |
| Expiry date | May 29, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F1/70
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present disclosure provides for many different embodiments. A mask fabrication method and system is provided. The method and system identify critical areas of an integrated circuit (IC) design layout that has undergone optical proximity correction. The critical areas are areas of the OPCed IC design layout that are at risk for hot spots. A lithography process check is then performed on the critical areas of the OPCed IC design layout.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.