Superior stability of characteristics of transistors having an early formed high-K metal gate

US8652917B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Markus Lenski · Dresden, DE
• Stephan Kronholz · Dresden, DE
• Nadja Zakowsky · Radebeul, DE

Key dates

• Filing date: May 23, 2012
• Grant date: Feb 18, 2014
• Expiry date: Sep 7, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

When forming sophisticated transistors on the basis of a high-k metal gate electrode structure and a strain-inducing semiconductor alloy, a superior wet cleaning process strategy is applied after forming cavities in order to reduce undue modification of sensitive gate materials, such as high-k dielectric materials, metal-containing electrode materials and the like, and modification of a threshold voltage adjusting semiconductor alloy. Thus, the pronounced dependence of the threshold voltage of transistors of different width may be significantly reduced compared to conventional strategies.