Integrated circuit packaging system with a stackable package and method of manufacture thereof
US8653654B2 · kind B2 · utility
9Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2009 |
| Grant date | Feb 18, 2014 |
| Priority date | — |
| Expiry date | Dec 16, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacture of an integrated circuit packaging system includes: forming a base assembly having a cavity and a through conductor adjacent to the cavity; connecting a first device to the base assembly with the first device within the cavity; connecting a second device to the base assembly with the second device within the cavity; and connecting an interposer substrate having an exposed external side over the through conductor with the exposed external side facing away from the through conductor and exposed to ambient.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.