Non-volatile memory device and method of manufacturing the same
US8654579B2 · kind B2 · utility
3Cited by
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6Claims
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Key dates
| Filing date | Nov 17, 2011 |
| Grant date | Feb 18, 2014 |
| Priority date | — |
| Expiry date | Jun 8, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory device includes a plurality of memory cells stacked along a channel protruded from a substrate, a first select transistor connected to one end of the plurality of memory cells, a first interlayer dielectric layer for being coupled between a source line and the first select transistor, and a second interlayer dielectric layer disposed between the first select transistor and the one end of the plurality of memory cells, and configured to include a first recess region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.