Methods and systems for allocating interrupts in a multithreaded processor
US8656145B2 · kind B2 · utility
8Cited by
18References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2008 |
| Grant date | Feb 18, 2014 |
| Priority date | — |
| Expiry date | May 25, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4818
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multithreaded processor capable of allocating interrupts is described. In one embodiment, the multithreaded processor includes an interrupt module and threads for executing tasks. The interrupt module can identify a priority for each thread based on a task priority for tasks being executed by the threads and assign an interrupt to a thread based at least on its priority.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.