Method for modeling variation in a feedback loop of a phase-locked loop
US8656207B2 · kind B2 · utility
3Cited by
5References
18Claims
0Family size
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Key dates
| Filing date | Dec 15, 2009 |
| Grant date | Feb 18, 2014 |
| Priority date | — |
| Expiry date | May 1, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/08
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method performs statistical static timing analysis of a network that includes a phase-locked loop and a feedback path. The feedback path comprises a set of delays operatively connected from the output of the phase-locked loop back to the input of the phase-locked loop. One embodiment herein computes a statistical feedback path delay for the feedback path. The method can use a separate statistical parameter to represent random uncorrelated delay variation for each delay in the feedback path. The method also computes an output arrival time for the phase-locked loop based on the negative of the statistical feedback path delay.
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